| Summary: | 碩士 === 國立中央大學 === 電機工程學系 === 85 === This thesis presents to study a-Si device modeling, and to
improve deviceand circuit simulation by using table-modeling
technology. It's divided intothree parts.First of all, the
table-modeling technique will be discussed. The table-
modelingtechnique requires the current and capacitance tables.
In order to verify thetable-modeling technique, the off-grid
current will interpolate with measuredcurrent. The table-
modeling technique has been proved because the result
isreasonable.Part 2 applys the table-modeling technique to
simulate a-Si TFT pixel. The current and capacitance tables are
obtained from a-Si analytical circuit model.The simulation
results are compared with the analytical model to make sure that
the table-modeling technique is practical and reliable.In the
previous part, the analytical model is a circuit-level model
based on many assumptions. This model can not completely predict
the semiconductor device. Thus, the 2-D numerical model is used
as a good approximation to simulate a-Si TFT pixel. For this
reason, the current and capacitance tables are generated from
2-D numerical model. The table-modeling technique will
alsosimulate one pixel. The simulation in a-Si circuit
application using the table-modeling technique is very close to
that using 2-D numerical model. We also discuss the non-quasi
static effects on the table model technique.
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