ATM Buffer Management and its VLSI Implementation

碩士 === 國立臺灣大學 === 電機工程學系 === 85 === The ATM is accepted as the transport technique for the B-ISDN and becomes one of the key techniques of current high speed network. How to design and implement a high performance and low cost ATM device is...

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Bibliographic Details
Main Authors: Huang, Wen-Yen, 黃文彥
Other Authors: Lia Fei-Pei, Tsai Zse-Hong
Format: Others
Language:zh-TW
Published: 1997
Online Access:http://ndltd.ncl.edu.tw/handle/51656652089220975365
Description
Summary:碩士 === 國立臺灣大學 === 電機工程學系 === 85 === The ATM is accepted as the transport technique for the B-ISDN and becomes one of the key techniques of current high speed network. How to design and implement a high performance and low cost ATM device is becoming more important for rapid development of network services. In this thesis, we introduce a chip set based architecture of ATM switch which has the advantages of system expandability and controllability. An 16x16 155Mbpsports switch controller has been implemented and its shows the potentialof further development. A buffer management mechanism which combines threepacket discarding schemems, including PPD, EPD and APPD, is implementedin the APPD switch controller. In addition, implementation of some necessaryfunctions of an ATM switch with an external processor are also introduced in this thesis.