| Summary: | 碩士 === 國立臺灣大學 === 機械工程學系 === 85 === In the IC manufacturing, the wafer processing takes much time in
furnaces than other equipment. How to efficiently integrate
furnaces with other automation machines are important. The
thesis aims to model and monitor a furnace workcell.The CTPN
(Colored Timed Petri Net) is used to model the furnace. Based on
CTPN, the dynamic behaviors of the furnace, such as loading,
processing, unloading and wafer count mismatching, can be
emulated the CTPN model is hierarchical and modular. The
hierarchical architecture is built by dividing the behaviors of
the furnace to make the model more compact and the modular
modeling make the model flexible and easy use.In addition to
modeling and analysis, the monitoring of the furnace system is
designed and accomplished. The furnace emulator provides a quasi
environment for upper level system testing. In addition, it
facilitates the design of the group controller without using
true equipment. Finally, the workcell concept is merged into the
furnace system.
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