The Modeling and Analysis Methodology on Components of VLSI Layout Image
碩士 === 中正理工學院 === 電機工程研究所 === 86 === The purpose of this thesis is to describe the design and implementation of CellModel Object-Oriented database software for VLSI layout images. The key techniques of this design are image processing, pattern recognition and blob analysis co...
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ndltd-TW-086CCIT04420042016-01-22T04:17:29Z http://ndltd.ncl.edu.tw/handle/94433248475883520853 The Modeling and Analysis Methodology on Components of VLSI Layout Image 積體電路佈局之影像內元件物件化模式分析方法研究與設計 Long-Chang Yeh 葉隆昌 碩士 中正理工學院 電機工程研究所 86 The purpose of this thesis is to describe the design and implementation of CellModel Object-Oriented database software for VLSI layout images. The key techniques of this design are image processing, pattern recognition and blob analysis component software. First, MIL(Matrox Imaging Library) and BCB(Borland C++ Builder) and OODB( Object-Oriented Database) are used to analysis the relation of VLSI layout images and component model. Next, line segmentation-traced area reconstruction algorithm is used to setup the parameters of the metal lines and nodes of the layout images, to separate the Source, Drain, and Gate of CMOS, and to recognize the contact or bypass of the metal lines. Finally, layout component database is constructed by integrating recognition database software. Te-Lien Lo 駱德廉 1998 學位論文 ; thesis 71 zh-TW |
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碩士 === 中正理工學院 === 電機工程研究所 === 86 === The purpose of this thesis is to describe the design and implementation of CellModel Object-Oriented database software
for VLSI layout images. The key techniques of this design are image processing, pattern recognition and blob analysis
component software.
First, MIL(Matrox Imaging Library) and BCB(Borland C++ Builder) and OODB( Object-Oriented Database) are used
to analysis the relation of VLSI layout images and component model. Next, line segmentation-traced area reconstruction
algorithm is used to setup the parameters of the metal lines and nodes of the layout images, to separate the Source, Drain,
and Gate of CMOS, and to recognize the contact or bypass of the metal lines. Finally, layout component database is
constructed by integrating recognition database software.
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Te-Lien Lo |
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Te-Lien Lo Long-Chang Yeh 葉隆昌 |
author |
Long-Chang Yeh 葉隆昌 |
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Long-Chang Yeh 葉隆昌 The Modeling and Analysis Methodology on Components of VLSI Layout Image |
author_sort |
Long-Chang Yeh |
title |
The Modeling and Analysis Methodology on Components of VLSI Layout Image |
title_short |
The Modeling and Analysis Methodology on Components of VLSI Layout Image |
title_full |
The Modeling and Analysis Methodology on Components of VLSI Layout Image |
title_fullStr |
The Modeling and Analysis Methodology on Components of VLSI Layout Image |
title_full_unstemmed |
The Modeling and Analysis Methodology on Components of VLSI Layout Image |
title_sort |
modeling and analysis methodology on components of vlsi layout image |
publishDate |
1998 |
url |
http://ndltd.ncl.edu.tw/handle/94433248475883520853 |
work_keys_str_mv |
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