A Design of High Performance 2-D DCT/IDCT Processor
碩士 === 中華大學 === 電機工程研究所 === 86 === Discrete Cosine Transform (DCT) has been commonly adopted in many transformation application such as image, video, and facsimile. The discrete transform (DCT) has been recognized as one of the standard techniques in image compression. Therefore, a core processor...
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| Format: | Others |
| Language: | en_US |
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1998
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| Online Access: | http://ndltd.ncl.edu.tw/handle/35714584534535445296 |
| Summary: | 碩士 === 中華大學 === 電機工程研究所 === 86 === Discrete Cosine Transform (DCT) has been commonly adopted in many transformation application such as image, video, and facsimile. The discrete transform (DCT) has been recognized as one of the standard techniques in image compression. Therefore, a core processor that rapidly compputes DCT/IDCT has become a key comonent-in image compression in VLSI implementation.
This paper describes ka 100-MHz two-dimensional DCT/IDCT core processor, whice is applicable to the real-time processigng of H.263 signals. Furthermore, mean values of errors generated in the core were minimezed to enhance the computational accuracy with the word-length constraints. Consequently,it features the fast operating speed under the low area with ist sufficient accuracy satisfying the specifications in CCITT recommendation H.263.
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