Design and Implementation of Noncoherent Data Demodulation Circuit for CDMA IS-95 Receiver
碩士 === 國立中央大學 === 電機工程學系 === 86 === This research emphasizes on the design of noncoherent data demodulation circuit forCDMA IS-95 receiver of spread spetrum mobile phone sys. The system is modeledas three part: a transmitter, a channel mo...
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ndltd-TW-086NCU004420662015-10-13T11:06:16Z http://ndltd.ncl.edu.tw/handle/58881700469144594901 Design and Implementation of Noncoherent Data Demodulation Circuit for CDMA IS-95 Receiver 適用於分碼多工IS-95系統接收端之非同調資料解調電路的設計與實現 Liu, Jian-Shing 劉建興 碩士 國立中央大學 電機工程學系 86 This research emphasizes on the design of noncoherent data demodulation circuit forCDMA IS-95 receiver of spread spetrum mobile phone sys. The system is modeledas three part: a transmitter, a channel model, and a receiver. The transmitter is usedto generate the transmitted signal in digital format. The signal passes through the channel to reach the receiver. The receiver is composed of two parts: a timing recoverymodule and a data demodulation module. SPW and Verilog are used to simulate and verifythe design in architture and gate level. The simulations results verify that thesystem is able to handle the worst case when the chip frequcncy error 200ppm, the chipphase error is 1/2 chip time, and AWGN is -6dB. The chip has been implemented our circuit using OPUS 0.6um SPDM standard cells form Compass. The test results reassurethe functionality of design. Chau-Chin Su 蘇朝琴 1998 學位論文 ; thesis 75 zh-TW |
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碩士 === 國立中央大學 === 電機工程學系 === 86 === This research emphasizes on the design of noncoherent data
demodulation circuit forCDMA IS-95 receiver of spread spetrum
mobile phone sys. The system is modeledas three part: a
transmitter, a channel model, and a receiver. The transmitter is
usedto generate the transmitted signal in digital format. The
signal passes through the channel to reach the receiver. The
receiver is composed of two parts: a timing recoverymodule and a
data demodulation module. SPW and Verilog are used to simulate
and verifythe design in architture and gate level. The
simulations results verify that thesystem is able to handle the
worst case when the chip frequcncy error 200ppm, the chipphase
error is 1/2 chip time, and AWGN is -6dB. The chip has been
implemented our circuit using OPUS 0.6um SPDM standard cells
form Compass. The test results reassurethe functionality of
design.
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author2 |
Chau-Chin Su |
author_facet |
Chau-Chin Su Liu, Jian-Shing 劉建興 |
author |
Liu, Jian-Shing 劉建興 |
spellingShingle |
Liu, Jian-Shing 劉建興 Design and Implementation of Noncoherent Data Demodulation Circuit for CDMA IS-95 Receiver |
author_sort |
Liu, Jian-Shing |
title |
Design and Implementation of Noncoherent Data Demodulation Circuit for CDMA IS-95 Receiver |
title_short |
Design and Implementation of Noncoherent Data Demodulation Circuit for CDMA IS-95 Receiver |
title_full |
Design and Implementation of Noncoherent Data Demodulation Circuit for CDMA IS-95 Receiver |
title_fullStr |
Design and Implementation of Noncoherent Data Demodulation Circuit for CDMA IS-95 Receiver |
title_full_unstemmed |
Design and Implementation of Noncoherent Data Demodulation Circuit for CDMA IS-95 Receiver |
title_sort |
design and implementation of noncoherent data demodulation circuit for cdma is-95 receiver |
publishDate |
1998 |
url |
http://ndltd.ncl.edu.tw/handle/58881700469144594901 |
work_keys_str_mv |
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