A study on slot reassemby and buffer allocation for different slot reuse schemes

碩士 === 國立雲林科技大學 === 電機工程技術研究所 === 86 === Cyclic-Reservation Multiple-Access(CRMA) is an access scheme for high-speed local and metropolitan area networks based on a unique direction, dual-bus configuration. For this network, the slot reuse problem is an important issue, and there has been...

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Bibliographic Details
Main Authors: Sheu Jyh-Rong, 許致榮
Other Authors: Pi-Rong Sheu
Format: Others
Language:zh-TW
Published: 1998
Online Access:http://ndltd.ncl.edu.tw/handle/06115906593302211394
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Summary:碩士 === 國立雲林科技大學 === 電機工程技術研究所 === 86 === Cyclic-Reservation Multiple-Access(CRMA) is an access scheme for high-speed local and metropolitan area networks based on a unique direction, dual-bus configuration. For this network, the slot reuse problem is an important issue, and there has been many literature on it already, therefore, most literature has dwelt on the issue of decreasing cycle lengths, less to discuss botQtot reassembly and buffer allocation under CRMA. On the other hand, workstation buffers are important yet limited resources; therefe, when workstation buffers are insufficient, it can cause failure in reception or composition on the part of data segments, which will result in data loss and reduction of system efficiency. This thesis is then devoted to a discussion of the management problem of buffers of different slot reuse schemes, especially the problem of calculating the size of workstation buffers and the problem of dealing with the insufficiency of workstation buffers. There are two main kinds of reuse in the thesis. One is named continuous slot reuse scheme, and the other one is named non-continuous slot reuse scheme. When the continuous slot scheme is adopted, both problems of the slot reassembly and the buffer size of the workstation needed are easy to solve, but how to find the optimal cycle length for each cycle is NP-complete. When the non-continuous slot reuse scheme is adopted, not only the optimal cycle length can be found in polynomial time, but also the cycle lgth is shorter than the solution of the continuous slot reuse scheme obtained. However, we have discovered that both problems of the slot reassembly and calculating the buffers of workstation needed are complicated when the non-continuous slot reuse scheme is adopted. In this thesis, we will make a comparison to the two main slot reuse schemes by the viewpoint of slot reassembly and the buffer size ofthe workstation needed. In the slot assembly problem, when the continuous slot reuse scheme is adopted, the slot assembly can be finished by modifying the slot format, not necessary to extend each slot length. On the other hand, because the header length of the original CRMA is not sufficient enough, a two bytes length is increased additionally to help the slots reassembly. In the buffer size problem, it is easy to calculate the size of workstation buffers if the continuous slot reuse scheme is adopted. Therefore, under the case of non-continuous reuse, the size of workstation buffers not only increased, but also complicated to calculate. So for the non-continuous slot reuse scheme, we will first of all present a simple upper bound for the size of workstation buffers; second, several efficient algorithms will be proposed to obtain an accurate calculation of the buffer size need for every workstation. In order to realize the buffer size needed for every workstation under the continuous slot reuse scheme and non-continuous slot reuse scheme, some experiments are made. Due to the buffer size of every workstation needed is large under the non-continuous scheme, the insufficiency of workstation buffers might occur. For this question, we also have designed several strategies to cope with the insufficiency of workstation buffers. These strategies fall into two categories which the reserve vectors are rejected by workstations and the other aren*t, furthermore the latter case can divide into the concentration mode and the distribution mode. For each strategy we construe its advtages and drawbacks, and both throughput and MAC delay experiments are made. At last, a comparison and discussion has been made between our simulation results and the case of continuous slot reuse. We have discovered that, even if the management problem of workstation buffers is taken into evaluation standard, non-continuous slot reuse is still superior to the continuous slot reuse in overall performance.