Design of a Fast Signed Binary Adder with Error Detection
碩士 === 中正理工學院 === 電機工程研究所 === 87 === Most of the cryptosystem, which implemented in software or hardware methods, need modular multiplication and modular exponentiation. In the hardware design of a good cryptosystem, the basic circuit should not include any error. The adder, which...
Main Authors: | Jui-Chang Lai, 賴瑞昌 |
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Other Authors: | Der-Chyuan Lou |
Format: | Others |
Language: | zh-TW |
Published: |
1999
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Online Access: | http://ndltd.ncl.edu.tw/handle/09740687812920260811 |
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