| Summary: | 博士 === 國立清華大學 === 資訊工程學系 === 87 === This dissertation presents some research results on multicast switch architectures for ATM networks. Two copy network architectures and one distributed routing network architecture are proposed. Issues on the integration between the copy network and the routing network are discussed. Some theorems and proves are developed to support the operation principles
of the architectures. Performance analysis and hardware complexity of the proposed architectures are also addressed.
The first of the proposed copy network architectures is named TPCN. TPCN is a self-routing copy network. It subdivides cell copy operation into two stages such that the switching nodes of the copy network can be developed with the most simplicity.
Therefore, the processing speed of the copy network can be enhanced.
The second one of the proposed copy network architectures is named PCN. PCN is an output-buffered copy network. Therefore, it has excellent delay / throughput performance. PCN distributes traffic onto many planes of copy networks arranged
side by side, so that cell copy can be performed in parallel.
Cell copy operation is carried out by self-routing networks.
The copy network designed for the PCN is not of square shape.
It has more outlets than inlets. Therefore, the fanout of a multicast connection is not limited by the size (number of input/output ports) of the switching system.
A Multicast Bounded-Fanout Principle is proposed which states that the overflow probability of a copy network can be reduced to an acceptable level if the output capacity of the copy network is properly expanded. Instead of building a very large expanded copy network, multiple small copy networks are arranged in parallel to effectively expand the aggregate output capacity of the copy networks.
The proposed routing network performs cell routing in a distributed way. A novel buffer management scheme is proposed for the routing network. With the buffer management scheme,
buffer space in Batcher-Banyan based ATM switching systems can be shared completely by the switch ports in a fair manner without disturbing the cell sequence. The proposed buffer management scheme works based on a simple algorithm and can be easily implemented by hardware. The performance of the proposed switching system is evaluated by both analytical model and simulation. The results show that excellent buffer utilization and low cell loss ratio can be achieved under both uniform and nonuniform traffic loads.
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