Design of the Control Module in a Shared Memory ATM Switch
碩士 === 國立臺灣大學 === 電機工程學研究所 === 87 === The demands of networks have dramatically increased in the last few years. To meet the requirements of the networks, a network must provide higher bandwidth and quality of services(QoS). And the Asynchronous Transfer Mode(ATM) network is recommended b...
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ndltd-TW-087NTU004420092016-02-01T04:12:41Z http://ndltd.ncl.edu.tw/handle/43009389216737852352 Design of the Control Module in a Shared Memory ATM Switch 共享記憶式ATM交換機之控制模組設計 Yi-Ping Kao 高亦平 碩士 國立臺灣大學 電機工程學研究所 87 The demands of networks have dramatically increased in the last few years. To meet the requirements of the networks, a network must provide higher bandwidth and quality of services(QoS). And the Asynchronous Transfer Mode(ATM) network is recommended by CCITT for B-ISDN. In this thesis, we design a shared memory ATM switch that can support many ATM functions such as multicasting, OAM, and Signaling. In this switch ,it can handle sixteen input and output ports, and it's line speed is 155 Mbps. Meanwhile, to decrease packet loss ratio, we also implement three kinds of packet discarding schemes such as EPD(Early Packet Discarding), PPD(Partial Packet Discarding), and APPD(Age Priority Packet Discarding) in this switch. In the APPD Switch Controller, it has three main control modules to complete the switch operations: the I/O Controller, the Queue Manager, and the Traffic Controller. This chip is designed by me and My classmates. I am responsible for the design of the I/O Controller, and the Queue Manager. And the Traffic Controller is designed by my partner Yann. Dr.Feipei Lai Dr.Zsehong Tsai 賴飛羆 蔡志宏 1999 學位論文 ; thesis 70 zh-TW |
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碩士 === 國立臺灣大學 === 電機工程學研究所 === 87 === The demands of networks have dramatically increased in the last few years. To meet the requirements of the networks, a network must provide higher bandwidth and quality of services(QoS). And the Asynchronous Transfer Mode(ATM) network is recommended by CCITT for B-ISDN. In this thesis, we design a shared memory ATM switch that can support many ATM functions such as multicasting, OAM, and Signaling. In this switch ,it can handle sixteen input and output ports, and it's line speed is 155 Mbps. Meanwhile, to decrease packet loss ratio, we also implement three kinds of packet discarding schemes such as EPD(Early Packet Discarding), PPD(Partial Packet Discarding), and APPD(Age Priority Packet Discarding) in this switch. In the APPD Switch Controller, it has three main control modules to complete the switch operations: the I/O Controller, the Queue Manager, and the Traffic Controller. This chip is designed by me and My classmates. I am responsible for the design of the I/O Controller, and the Queue Manager. And the Traffic Controller is designed by my partner Yann.
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Dr.Feipei Lai |
author_facet |
Dr.Feipei Lai Yi-Ping Kao 高亦平 |
author |
Yi-Ping Kao 高亦平 |
spellingShingle |
Yi-Ping Kao 高亦平 Design of the Control Module in a Shared Memory ATM Switch |
author_sort |
Yi-Ping Kao |
title |
Design of the Control Module in a Shared Memory ATM Switch |
title_short |
Design of the Control Module in a Shared Memory ATM Switch |
title_full |
Design of the Control Module in a Shared Memory ATM Switch |
title_fullStr |
Design of the Control Module in a Shared Memory ATM Switch |
title_full_unstemmed |
Design of the Control Module in a Shared Memory ATM Switch |
title_sort |
design of the control module in a shared memory atm switch |
publishDate |
1999 |
url |
http://ndltd.ncl.edu.tw/handle/43009389216737852352 |
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