| Summary: | 碩士 === 國立臺灣大學 === 電機工程學研究所 === 87 === In this thesis, we propose an Automatic Gain Control (AGC) system using Barker code as its training sequence for Asynchronous Digital Subscriber Loop (ADSL). The advantage of this architecture is that Barker code has the characteristic of large Peak-Side-lobe Ratio (PSR). We can easily get the information of the amplitude and the channel delay. The amplitude information is useful for the convergence of the AGC system, and the channel delay information can be provided to the equalizer.
We adopt UMC 0.5um DPDM 3v CMOS technology to design and layout our circuits. The AGC mainly is composed of forward path, such as Variable Gain Amplifier (VGA), Band-Pass Filter (BPF), and Gain & Buffer stage as well as feedback path, like Barker code detector, DAC, and integrator.
In forward path, VGA is composed of a current squaring circuit and four stages of main amplifier. The gain dynamic range of the VGA is 58db and the bandwidth is up to 20 MHz in the worst case. Besides, the total harmonic distortion is less than -66db. BPF is composed of a fourth order Chebyshev high-pass filter as well as an eighth order Elliptic low-pass filter. The bandwidth of the BPF is from 100 kHz to 500 kHz and the ripple in the pass-band must be less than 1db. Double MOSFET resistors are employed instead of the resistors in the filters. In order to overcome the process variation and thermal drift, an additional double MOSFET resistor tuning circuit is adopted. From the simulation result, the variance of the two spectrum edge is less than 1.5% in the greatest process variation and the thermal drift from 0oC to 80oC. To amplify the output of the BPF and drive it out of the chip, we design a gain & buffer stage. The cut-off frequency is up to 10 MHz with the parasitic capacitance loads of the output pads, and the THD is better than -68db when the output voltage signal is 2vpp.
In feedback path, the barker code detector receives the digital signal from the external 10-bits ADC. The auto-correlation and maximum searching circuits generate the amplitude information. Then the digital signal is converted to an analogical one by 6-bits DAC. Via the integrator, we integrate the analog from DAC and feed to VGA to control the gain.
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