| Summary: | 博士 === 國立臺灣大學 === 電機工程學研究所 === 87 === In this thesis, we propose an efficient architecture for the two-Dimensional Forward and Inverse Discrete Wavelet Transform (2-D DWT and IDWT). The proposed 2-D DWT architecture includes a transform module, a RAM module, and a multiplexer. In the transform module, we employ the polyphase decomposition technique and the coefficient folding technique to the decimation filters of stages 1 and 2, respectively. The RAM size is N/2 * N/2. The design scheme of the proposed 2-D IDWT architecture is employing the reverse manner. In comparison with other 2-D DWT and IDWT architectures, the advantages of the proposed architecture are the 100% hardware utilization, fast computing time, regular data flow, and low control complexity, making this architecture suitable for next generation image coding/decoding systems.
In addition, we also apply wavelet coding to image compression, including 2-D wavelet image coding and 3-D wavelet video coding. From the simulation results, we find that wavelet coding is one of the most potential coding schemes for the high quality visual communications and the broadband integrated services digital network (BISDN) environment in the future. After that, by use of the block shifting technique, we propose a new method for reduction of blocking effects in very low bit-rate coding. The experiment results also demonstrate the feasibility of our proposed method. Finally, to minimize the requirement of delay elements, we investigate the best permutation strategy for temporal, vertical, and horizontal filtering in 3-D wavelet video coding.
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