The Realization Study of Modular Phase-Shifted Zero-Voltage-Switching Full-Bridge Converter
碩士 === 國立臺灣科技大學 === 電子工程系 === 87 === Abstract This thesis presents a strategy for realizing a medium-power module AC/DC converter by zero-voltage-switching pulse-width modulation (ZVS-PWM) technique. A full-bridge topology is employed and a voltage-mode control is adopted to acquire good...
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ndltd-TW-087NTUST4280692016-02-01T04:12:44Z http://ndltd.ncl.edu.tw/handle/79644474761723795900 The Realization Study of Modular Phase-Shifted Zero-Voltage-Switching Full-Bridge Converter 模組化全橋相移式零電壓轉換系統之研製 Chuang Chei Cheng 莊志成 碩士 國立臺灣科技大學 電子工程系 87 Abstract This thesis presents a strategy for realizing a medium-power module AC/DC converter by zero-voltage-switching pulse-width modulation (ZVS-PWM) technique. A full-bridge topology is employed and a voltage-mode control is adopted to acquire good voltage regulation. The valid duty and the sub-duty intervals in the full-bridge loop are exactly estimated. The complete primary current profile with respect to each transition interval of the phase-shift process is derived and modeled. A master-slave active current sharing technique is used as the modulus parallel strategy in the design. A complete small-signal flow chart and inner transfer function of the master and slave module converter is derived. A design example for simulating and realizing a power supply with 4+1 modules of total power 3.75kW (single module’s output is 24V~30V/25A) FB-PS-ZVS-PWM converter including output voltage adjustment and parallel load current sharing is conducted to assess the system performance and to verify the theoretical predictions. G. C. Hsieh 謝冠群 1999 學位論文 ; thesis 96 zh-TW |
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碩士 === 國立臺灣科技大學 === 電子工程系 === 87 === Abstract
This thesis presents a strategy for realizing a medium-power module AC/DC converter by zero-voltage-switching pulse-width modulation (ZVS-PWM) technique. A full-bridge topology is employed and a voltage-mode control is adopted to acquire good voltage regulation. The valid duty and the sub-duty intervals in the full-bridge loop are exactly estimated. The complete primary current profile with respect to each transition interval of the phase-shift process is derived and modeled. A master-slave active current sharing technique is used as the modulus parallel strategy in the design. A complete small-signal flow chart and inner transfer function of the master and slave module converter is derived. A design example for simulating and realizing a power supply with 4+1 modules of total power 3.75kW (single module’s output is 24V~30V/25A) FB-PS-ZVS-PWM converter including output voltage adjustment and parallel load current sharing is conducted to assess the system performance and to verify the theoretical predictions.
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author2 |
G. C. Hsieh |
author_facet |
G. C. Hsieh Chuang Chei Cheng 莊志成 |
author |
Chuang Chei Cheng 莊志成 |
spellingShingle |
Chuang Chei Cheng 莊志成 The Realization Study of Modular Phase-Shifted Zero-Voltage-Switching Full-Bridge Converter |
author_sort |
Chuang Chei Cheng |
title |
The Realization Study of Modular Phase-Shifted Zero-Voltage-Switching Full-Bridge Converter |
title_short |
The Realization Study of Modular Phase-Shifted Zero-Voltage-Switching Full-Bridge Converter |
title_full |
The Realization Study of Modular Phase-Shifted Zero-Voltage-Switching Full-Bridge Converter |
title_fullStr |
The Realization Study of Modular Phase-Shifted Zero-Voltage-Switching Full-Bridge Converter |
title_full_unstemmed |
The Realization Study of Modular Phase-Shifted Zero-Voltage-Switching Full-Bridge Converter |
title_sort |
realization study of modular phase-shifted zero-voltage-switching full-bridge converter |
publishDate |
1999 |
url |
http://ndltd.ncl.edu.tw/handle/79644474761723795900 |
work_keys_str_mv |
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