| Summary: | 碩士 === 國立雲林科技大學 === 電子工程與資訊工程技術研究所 === 87 === In this thesis, we propose an algorithm, called the Switching Tree codevector-index-coding algorithm, to re-encode the output codevector indexes after vector quantization. In the process of lossy compression in vector quantization, it has the characteristic of high compression ratio for the image. In this thesis, we investigate a new lossless compression method for further compressing the codevector indexes after VQ encoder. Then, based on the developed algorithm the VLSI architecture is deduced and implemented.
For developing the algorithm, firstly, the different kinds of code tree was considered and deduced according to the characteristic of the smooth and sharp area of an image. We also make a suitable coding direction in index matrix for the code tree. Second, we find the relationship between the random distribution of the image and code tree to estimate the performance of the algorithm. In the other hand, the algorithm was simulated under Matlab programming tool. Finally, the simulation results was analyzed and compared for improving the performance of the algorithm.
After deriving the algorithm, the corresponding VLSI architecture is designed under the consideration of low cost and real-time processing. The VLSI architecture is composed of a series of decision-control step. Besides, we schedule the decision-control step according to the different design technique. Next, after Verilog HDL simulation, we use the Synopsys synthesis tool to estimate the area and performance of the VLSI hardware. Finally, the VLSI hardware of this lossless compression method is implemented by using CAD tools.
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