pplying the Genetic Algorithm to Schedule the Production of Wafer Foundry

• Main Author: 賴秀香
• Other Authors: 魏秋建
• Format: Others
• Language: zh-TW
• Published: 2000
• Online Access: http://ndltd.ncl.edu.tw/handle/17309673127454568803

碩士 === 中華大學 === 工業工程與管理研究所 === 88 === Along with the development of electronics technology and demand of related products, the semiconductor manufacturing has been prosperously expanded. However, the wafer production if characterized by complicated process, long and significant variation of production cycle time and great amount of work-in-process. As a result, the manufacturing planning and production schedule of the wafer fabrication becomes a difficult task. This study aims to develop a production scheduling system for the wafer factory. The scheduling system is divided into two phases. In the first phase, based upon the reentry feature of the wafer manufacturing, the Conway Estimation, Little’s Formula and fix work-in-process amounts are combined to construct a production cycle time estimation model. In the second phase, using the results obtained in the first phase, the order tardiness is minimized to search for the shop floor dispatching rule using the genetic algorithm. The simulation results indicate that the production cycle time obtained using the proposed method generates better solution than that obtained using the traditional capacity requirement planning.