A Study on Reducing The Impact of False Sharing and Replacement Stall for F-COMA and Implementation of Its Simulation and Evaluation Environment

碩士 === 國立交通大學 === 資訊工程系 === 88 === F-COMA is designed to promote hit rate, while local cache is not large enough to serve most accesses. Thus, it provides data replication and migration, and let each processor access the requested data block locally. Unfortunately too many coherence misse...

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Bibliographic Details
Main Authors: Jiang-Long Wu, 吳江龍
Other Authors: Cheng Chen
Format: Others
Language:en_US
Published: 2000
Online Access:http://ndltd.ncl.edu.tw/handle/54630918739202809334
Description
Summary:碩士 === 國立交通大學 === 資訊工程系 === 88 === F-COMA is designed to promote hit rate, while local cache is not large enough to serve most accesses. Thus, it provides data replication and migration, and let each processor access the requested data block locally. Unfortunately too many coherence misses will drop down the performance of F-COMA, because remote accesses have critical latency. False sharing miss is a kind of coherence miss, and it should not happen necessarily. Hence, it is important to reduce false sharing misses in F-COMA. Because there is no memory in F-COMA, we must reserve the last valid block while it is replaced. In this thesis, we use sub-block mechanism to reduce the impact of false sharing, and some replacement techniques to reduce replacement stall time. Based on our evaluation results, we have shown that these two methods speedup the total performance about 5% in average under SPLASH benchmarks. The detailed information about design principles and performance evaluations will be described in the literature.