True RMS Converters Using Delta-Sigma Modulation

博士 === 國立交通大學 === 電子工程系 === 88 === A true rms converter provides a dc output equal to the rms value of an ac or fluctuating dc input, and the extensive use of delta-sigma (DS) modulators in mixed-mode integrated circuits (ICs) has shown promise for coping with the analog component limitations inhere...

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Main Authors: Wei-Shinn Wey, 魏維信
Other Authors: Prof. Yu-Chung Huang
Format: Others
Language:en_US
Published: 2000
Online Access:http://ndltd.ncl.edu.tw/handle/78328120168846005994
id ndltd-TW-088NCTU0428008
record_format oai_dc
spelling ndltd-TW-088NCTU04280082015-10-13T10:59:52Z http://ndltd.ncl.edu.tw/handle/78328120168846005994 True RMS Converters Using Delta-Sigma Modulation 使用差和調變之真實均方根轉換器 Wei-Shinn Wey 魏維信 博士 國立交通大學 電子工程系 88 A true rms converter provides a dc output equal to the rms value of an ac or fluctuating dc input, and the extensive use of delta-sigma (DS) modulators in mixed-mode integrated circuits (ICs) has shown promise for coping with the analog component limitations inherent in VLSI technologies. A true rms converter using DS modulation thus is expected to have the advantages of not only CMOS integration flexibility but also being robustness against circuit elements imperfections. In this dissertation, we present a new architecture based on oversampling technique to realize a low-cost true rms converter in CMOS technologies, especially for a further integration of a handheld DMM chip. To construct a DS true rms converter, we extend the use of the DS modulator by considering the reference as a variable input and propose a new model for describing the behavior of a DS modulator with a variable reference. This new model will be found to be more essential than traditional linear model since it can be applied to analyze the behavior of not only DS true rms converters but also traditional DS modulators with reference interfered by a random signal. Based on this model, the signal-to-quantization-noise ratio (SQNR) as well as transfer characteristics of the proposed architecture have been deduced to obtain initial design parameters. A test chip of the proposed converter was successfully fabricated in a 0.8mm double-poly double-metal (DPDM) CMOS process and occupies active area of 1 mm2. The use of indirect charge transfer (IDCT) technique makes the converter gain depend only on an on-chip capacitor ratio, reducing gain drift and offering good gain accuracy. Measured results show that this converter achieves a SNR of 88 dB and a relative error of ±0.2% for arbitrary inputs with a signal crest factor up to 3. The signal bandwidth exceeds 50 kHz and the full-scale input range is greater than 0.4 Vrms. Without trimming and calibration, this converter has an absolute gain error less than ±0.4%. Prof. Yu-Chung Huang 黃宇中 2000 學位論文 ; thesis 63 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 博士 === 國立交通大學 === 電子工程系 === 88 === A true rms converter provides a dc output equal to the rms value of an ac or fluctuating dc input, and the extensive use of delta-sigma (DS) modulators in mixed-mode integrated circuits (ICs) has shown promise for coping with the analog component limitations inherent in VLSI technologies. A true rms converter using DS modulation thus is expected to have the advantages of not only CMOS integration flexibility but also being robustness against circuit elements imperfections. In this dissertation, we present a new architecture based on oversampling technique to realize a low-cost true rms converter in CMOS technologies, especially for a further integration of a handheld DMM chip. To construct a DS true rms converter, we extend the use of the DS modulator by considering the reference as a variable input and propose a new model for describing the behavior of a DS modulator with a variable reference. This new model will be found to be more essential than traditional linear model since it can be applied to analyze the behavior of not only DS true rms converters but also traditional DS modulators with reference interfered by a random signal. Based on this model, the signal-to-quantization-noise ratio (SQNR) as well as transfer characteristics of the proposed architecture have been deduced to obtain initial design parameters. A test chip of the proposed converter was successfully fabricated in a 0.8mm double-poly double-metal (DPDM) CMOS process and occupies active area of 1 mm2. The use of indirect charge transfer (IDCT) technique makes the converter gain depend only on an on-chip capacitor ratio, reducing gain drift and offering good gain accuracy. Measured results show that this converter achieves a SNR of 88 dB and a relative error of ±0.2% for arbitrary inputs with a signal crest factor up to 3. The signal bandwidth exceeds 50 kHz and the full-scale input range is greater than 0.4 Vrms. Without trimming and calibration, this converter has an absolute gain error less than ±0.4%.
author2 Prof. Yu-Chung Huang
author_facet Prof. Yu-Chung Huang
Wei-Shinn Wey
魏維信
author Wei-Shinn Wey
魏維信
spellingShingle Wei-Shinn Wey
魏維信
True RMS Converters Using Delta-Sigma Modulation
author_sort Wei-Shinn Wey
title True RMS Converters Using Delta-Sigma Modulation
title_short True RMS Converters Using Delta-Sigma Modulation
title_full True RMS Converters Using Delta-Sigma Modulation
title_fullStr True RMS Converters Using Delta-Sigma Modulation
title_full_unstemmed True RMS Converters Using Delta-Sigma Modulation
title_sort true rms converters using delta-sigma modulation
publishDate 2000
url http://ndltd.ncl.edu.tw/handle/78328120168846005994
work_keys_str_mv AT weishinnwey truermsconvertersusingdeltasigmamodulation
AT wèiwéixìn truermsconvertersusingdeltasigmamodulation
AT weishinnwey shǐyòngchàhédiàobiànzhīzhēnshíjūnfānggēnzhuǎnhuànqì
AT wèiwéixìn shǐyòngchàhédiàobiànzhīzhēnshíjūnfānggēnzhuǎnhuànqì
_version_ 1716835445380218880