On the Cell-based IC Design of Parallel CMAC Neural Network Chip
碩士 === 國立交通大學 === 電機與控制工程系 === 88 === The object of this thesis is to build the CMAC neural network chip with parallel computing capability via VLSI chip，and to design a CMAC neural network hardware system。We use the CMAC chip to improve results in controlling nonlinear systems。 In this p...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/10911158703100699641 |
| Summary: | 碩士 === 國立交通大學 === 電機與控制工程系 === 88 === The object of this thesis is to build the CMAC neural network chip with parallel computing capability via VLSI chip，and to design a CMAC neural network hardware system。We use the CMAC chip to improve results in controlling nonlinear systems。
In this paper，we use SIMD computation architecture and the Cell-Based IC Design environment which is supported by CIC to design the CMAC chip with parallel computing capability。The CMAC Chip designed has the ability to fetch or store two data simultaneously。First，we transform the generalization algorithm proposed by D.Ellision into physical circuits。In the chip circuit and selection of CMAC specific parameters，we replace multiplier and divisor by shifters，so the chip circuit becomes simpler。 We use the IC checking and simulation tool supported by CIC to verify the design。Finally，we apply the CMAC chip to learn the three-dimension nonlinear function to verify our design。
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