Algorithms, Architectures, and Applications for Parallel Concatenated Coding

博士 === 國立清華大學 === 電機工程學系 === 88 === Turbo codes are the most exciting and potentially important development in coding theory in many years. Since the appearance of turbo codes, parallel concatenated codes (PCCs) have given rise to great interest in the coding community. An important feature regardin...

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Bibliographic Details
Main Authors: Jah-Ming Hsu, 許智明
Other Authors: Chin-Liang Wang
Format: Others
Language:en_US
Published: 2000
Online Access:http://ndltd.ncl.edu.tw/handle/93999966742601733586
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Summary:博士 === 國立清華大學 === 電機工程學系 === 88 === Turbo codes are the most exciting and potentially important development in coding theory in many years. Since the appearance of turbo codes, parallel concatenated codes (PCCs) have given rise to great interest in the coding community. An important feature regarding PCCs is that they permit iterative decoding using soft-input soft-output (SISO) decoders and exhibit an outstanding performance close to that of ML decoding. However, a long interleaver is required to achieve satisfactory performance. Since a long interleaver is often used for turbo codes, the problem of decoding delay can pose constraint on turbo codes for some delay sensitive applications. We present a parallel MAP decoding scheme for turbo codes that can shorten the MAP decoding delay to 1/W of the conventional approach where W is the number of subblocks used in the proposed scheme. The advantage of the proposed parallel scheme is that it can reduce the turbo code decoding delay in a pipelined turbo decoder, or it can allow more iterations to improve the bit error rate performance in a serial turbo decoder. Reed-Solomon (RS) codes are powerful block codes. They are good candidates for the component codes in concatenated coding systems. Iterative decoding of concatenated RS codes requires a soft-input soft-output (SISO) decoding algorithm. The Chase-type SISO algorithm can serve this purpose. However, it needs to perform the RS algebraic decoding many times, thereby requiring a high speed RS algebraic decoder. We present an area-efficient pipelined VLSI architecture for decoding RS codes. The soft-information exchange in iterative decoding of turbo codes has been demonstrated to give good performance. This has motivated us to apply the concept of soft-information exchange to the design of a DS-CDMA receiver. We propose a soft-input soft-output decorrelating block-decision feedback detector (SISO-DBDFD). It can produce the reliability information of the decoded bits and accept the a priori information from the channel decoder output. We further propose an iterative multiuser receiver based on the SISO-DBDFD. The performance of the proposed iterative receiver outperforms its noniterative counterpart. In order to provide a better communication quality and larger transmission capacity in wireless communications systems, channel coding with high coding gains is highly desired. Turbo codes have been chosen as one of the coding scheme for the upcoming 3rd generation wireless communication system. However, turbo decoding algorithms require the explicit knowledge of channel state information to achieve their ultimate performance. For the frequency-nonselective Rayleigh fading channels, we present a new channel re-estimation scheme for turbo codes. The performance of the proposed scheme is close to that of the ideal situation where the fades are precisely known especially for the fast-fading channels.