An Application of TOC to Capacity Analysis and Dispatching of CCR in Wafer Fabrication Factory

• Main Authors: Chen-Hung Lin, 林振宏
• Other Authors: Chiu-Chi Wei
• Format: Others
• Language: zh-TW
• Published: 2001
• Online Access: http://ndltd.ncl.edu.tw/handle/70284228808253811989

碩士 === 中華大學 === 工業工程與管理研究所 === 89 === Semiconductor is a capital-intensive industry requiring high technologies, and among those products, DRAM is a highly standardized component. This feature attracts many manufacturers to invest in the newest machinery and advanced process technologies. As a result, the one using the outdated equipment will certainly be defeated by their competitors. To maximize the outcome of the enterprises, the manufacturers need not only to produce high value-added products, but also to convert their production type from low volume and diverse products to high volume and few products. Due to the fact that processes of different generation vary significantly, this study intends to propose an equipment utilization model using the theory of constraint to maximize the production efficiency of the resource constrained machinery.