| Summary: | 碩士 === 中華大學 === 資訊工程學系碩士班 === 89 === We propose a data translator called Wrapper between AMBA bus system provided in ARM processor series from ARM Incorporation and a general purpose memory mapped I/O interface for many application IPs (Intellectual Property) in this thesis. We don’t need to modify the original IP design to connected on AMBA with this Wrapper. So that many application IPs can be mounted on ARM system directly to enhance the ARM system power!
In this proposed Wrapper architecture, in order to reach high performance transfer and match up different timing. We use FIFO to be data transfer interface. And then we use FSM(Finite State Machine) to handle the whole transfer process. To utilize this mechanism, we will transfer simply from the Memory-mapped I/O interface to AMBA interface.
By the experimental result, this proposed Wrapper design can transfer data from Memory-mapped I/O interface to AMBA interface correctly. And then, the increase of the area and effect of performance are small.
|
|---|
