A Study of Dynamic Dispatching Using Lot Priority in Wafer fabs
碩士 === 中原大學 === 工業工程研究所 === 89 === This research proposes and evaluates several priority assignment heuristics for lots in wafer fabs. Lots are grouped into five classes: super hot, hot, rush, normal, and slow. The priority of each lot can be statically or dynamically determined. Static priority...
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ndltd-TW-089CYCU50300212016-07-06T04:10:05Z http://ndltd.ncl.edu.tw/handle/24026010187937316092 A Study of Dynamic Dispatching Using Lot Priority in Wafer fabs 晶圓製造廠考慮批量優先序之動態派工研究 Chia-Yu Hslao 蕭佳毓 碩士 中原大學 工業工程研究所 89 This research proposes and evaluates several priority assignment heuristics for lots in wafer fabs. Lots are grouped into five classes: super hot, hot, rush, normal, and slow. The priority of each lot can be statically or dynamically determined. Static priority setting means the lot’s priority is determined when it is released, and this priority will not change during the lot’s entire process. Dynamic priority setting means the lot’s priority is dynamically changed based on its slack. Machines are classified into bottleneck and non-bottleneck, based on their average utilization over the past 12, 24, and 72 hours in different experiments. A bottleneck machine uses HPF heuristic to select a lot with the highest priority, while a non-bottleneck machine uses FGCA+ heuristic to select a lot with the least number of steps toward a bottleneck machine. AutoSched simulation models are built to evaluate the performance of the proposed heuristics, including average cycle time, average work-in-process, percent on-time delivery, turn ratio, and progress of processing time. A foundry fab with 346 machines and five major product types with an average of 280 steps is studied. Simulation results show that dynamic priority setting based on 12-hour bottleneck machine identification leads to best performance. James C. Chen 陳建良 2001 學位論文 ; thesis 50 zh-TW |
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碩士 === 中原大學 === 工業工程研究所 === 89 ===
This research proposes and evaluates several priority assignment heuristics for lots in wafer fabs. Lots are grouped into five classes: super hot, hot, rush, normal, and slow. The priority of each lot can be statically or dynamically determined. Static priority setting means the lot’s priority is determined when it is released, and this priority will not change during the lot’s entire process. Dynamic priority setting means the lot’s priority is dynamically changed based on its slack. Machines are classified into bottleneck and non-bottleneck, based on their average utilization over the past 12, 24, and 72 hours in different experiments. A bottleneck machine uses HPF heuristic to select a lot with the highest priority, while a non-bottleneck machine uses FGCA+ heuristic to select a lot with the least number of steps toward a bottleneck machine.
AutoSched simulation models are built to evaluate the performance of the proposed heuristics, including average cycle time, average work-in-process, percent on-time delivery, turn ratio, and progress of processing time. A foundry fab with 346 machines and five major product types with an average of 280 steps is studied. Simulation results show that dynamic priority setting based on 12-hour bottleneck machine identification leads to best performance.
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author2 |
James C. Chen |
author_facet |
James C. Chen Chia-Yu Hslao 蕭佳毓 |
author |
Chia-Yu Hslao 蕭佳毓 |
spellingShingle |
Chia-Yu Hslao 蕭佳毓 A Study of Dynamic Dispatching Using Lot Priority in Wafer fabs |
author_sort |
Chia-Yu Hslao |
title |
A Study of Dynamic Dispatching Using Lot Priority in Wafer fabs |
title_short |
A Study of Dynamic Dispatching Using Lot Priority in Wafer fabs |
title_full |
A Study of Dynamic Dispatching Using Lot Priority in Wafer fabs |
title_fullStr |
A Study of Dynamic Dispatching Using Lot Priority in Wafer fabs |
title_full_unstemmed |
A Study of Dynamic Dispatching Using Lot Priority in Wafer fabs |
title_sort |
study of dynamic dispatching using lot priority in wafer fabs |
publishDate |
2001 |
url |
http://ndltd.ncl.edu.tw/handle/24026010187937316092 |
work_keys_str_mv |
AT chiayuhslao astudyofdynamicdispatchingusinglotpriorityinwaferfabs AT xiāojiāyù astudyofdynamicdispatchingusinglotpriorityinwaferfabs AT chiayuhslao jīngyuánzhìzàochǎngkǎolǜpīliàngyōuxiānxùzhīdòngtàipàigōngyánjiū AT xiāojiāyù jīngyuánzhìzàochǎngkǎolǜpīliàngyōuxiānxùzhīdòngtàipàigōngyánjiū AT chiayuhslao studyofdynamicdispatchingusinglotpriorityinwaferfabs AT xiāojiāyù studyofdynamicdispatchingusinglotpriorityinwaferfabs |
_version_ |
1718337405570777088 |