| Summary: | 碩士 === 國立成功大學 === 電機工程學系 === 89 === This thesis presents design, implementation, and measurement of a synchronization circuit for a DSP-based PLL frequency synthesizer to be used in frequency-hopping wireless communications. The synchronization circuit is derived from a typical tracking circuit which is based on an energy detector. The synchronization circuit uses the DSP-chip TMS320C50 as the controller. In synchronizing process, the coarse synchronization is achieved by all channel series search method. When tracking takes place, the synchronization circuit operation can reach a 90 percent synchronization of the received signal. The realized synchronization circuit with a DSP-based PLL frequency synthesizer are incorporated with a 2.4GHz transmitting and receiving RFIC RF-modules to conduct frequency-hopping FSK digital transmission test. The measurements include different configurations, such as fixed LO frequency, frequency hopping (with timing synchronization).
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