Analog Behavioral Model of PLL

碩士 === 國立臺灣科技大學 === 電子工程系 === 89 === Macromodel computer simulation can be used for speeding up the design process. It is accurate, but for simulating a complex analog circuit or system, it often takes long time, or even can’t be convergent. Therefor, it is desirable to develop a higher l...

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Bibliographic Details
Main Authors: CHENG, CHUNG-WEI, 鄭仲惟
Other Authors: Wang Shiow-Ren
Format: Others
Language:zh-TW
Published: 2001
Online Access:http://ndltd.ncl.edu.tw/handle/43745783013723009369
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Summary:碩士 === 國立臺灣科技大學 === 電子工程系 === 89 === Macromodel computer simulation can be used for speeding up the design process. It is accurate, but for simulating a complex analog circuit or system, it often takes long time, or even can’t be convergent. Therefor, it is desirable to develop a higher level model in electronic circuit simulation, and the model can simulate major features of the original system. The Analog Behavior Model(ABM) of Pspice 9.0 offers a convenient way for users to simulate very complex circuit systems. It is used to describe circuit features instead of detailed original circuits. ABM not only has the advantage of Analog Hardware Description Languages (AHDL), but also has more portable features than AHDL. This paper is to apply the ABM of Pspice 9.0 to establish the ABM of Phase-Locked Loop (PLL). The model uses (if, then, else) structure to simulate non-linear factors of the PLL. It causes the simulation result closer to the real electronic system, and its simulating time is more reasonable. Simulation results matched well with the hardware experiments.