| Summary: | 碩士 === 大同大學 === 資訊工程研究所 === 89 === Because of the advance of VLSI technology, the number of transistors in a single chip increases exponentially. A single chip now may contain sub-billion transistors and thus can hold the whole system inside. Since traditional CAD tools cannot effectively support System-On-a-Chip (SOC) design, we propose a web-based CAD tool for SOC design and Hardware/Software Codesign based on self-timed system technology.
This CAD tool, called SOCAD, provides
- the specification tool which is a graphic-based user interface for designers to specify system (or circuit) behaviors based on data dependency graph,
- the optimization tools to optimize the data dependency graph and the circuit for better performance, less power consumption and/ or less logic and
- the translation tool to automatically translate the graph-based specifications into VHDL codes.
This thesis focuses on the algorithms and the implementation of automatically translating graph-based specifications into VHDL codes and the optimization schemes. The goal of SOCAD is to facilitate SOC design and Hardware/Software codesign to reduce the design time and the time to market. We intend to build SOCAD in Java as a web-based CAD tool that can be used by anyone, in anywhere, at any time and on any platform.
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