A 1-GHz 0.25um 2.5v 32-bit CMOS Adder
碩士 === 國立中正大學 === 電機工程研究所 === 90 === CD(Clock-Delayed) domino logic circuits design offers higher speed and smaller area than conventional domino logic circuit; it is very popular in the high-performance circuits design. This paper presents new CD domino logic circuit that is derived from...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/17395764543475577728 |