Managing Flow Line with Multiple Bridge Cranes--A Wafer Cleaning Process Example

• Main Authors: Yueh-Mei Lai, 賴月梅
• Other Authors: Jy-Hsin Lin
• Format: Others
• Language: zh-TW
• Published: 2002
• Online Access: http://ndltd.ncl.edu.tw/handle/67314571810167708141

碩士 === 華梵大學 === 工業管理學系碩士班 === 90 === Without interstage buffer, the dependency between adjacent stations of a serial line increases drastically. As the system fluctuates, the starving and blocking of workstations occur constantly, which greatly decrease the line throughput. The effects of fluctuation become even more severely when the difference gap between the processing times gets wider. Such phenomenon may be observed in many manufacturing settings such as wafer cleaning process, PCB electroplate and coating process. During the wafer cleaning process, the current cleaning system behaves as a typical serial line without interstage buffer. The line efficiency is poor. Also the current system is configured to use few bridge cranes to transport wafers between stations, which makes the system performances such as queue time, flow time, yield even worse. Under certain assumptions, this research first used a series of single factor experiments to determine the control factors. Next, two separate L9 and L8 Taguchi experiments were devised and several simulation runs were conducted to explore the effects caused by the internal factors (number of cranes, parking methods, dispatching rules, buffers allocation) and external factor (processing times variation). The results indicate that each control factor has significant effects on every performance indices except the utilization index. Among those factors, the effect caused by the number of cranes is the most significant, following by parking position, dispatching methods and buffer allocation. As for the external factor, as the CV of processing time increases, the cycle time and queue time also increase, but the process yield and the equipment utilization decrease.