| Summary: | 博士 === 國立成功大學 === 電機工程學系碩博士班 === 90 === As the aggressive downscaling of CMOS technology continues, further reduction of gate oxide thickness is essential for low supply voltage and high driving capability. However, the excessive gate direct tunneling and the boron penetration issues phase out the use of conventional silicon dioxide gate dielectric as early as the 100nm CMOS process. The development of new gate materials with higher dielectric constant and better boron penetration immunity become necessary and urgent. Before the successful introduction of identified high-K materials, the nitride-related materials have been emerged as the most promising candidates for replacing silicon oxide as a gate dielectric for sub-100nm node. In this thesis, the major issues for the thickness reduction of silicon dioxide and the characteristics of ultra-thin nitride-related materials including NH3 thermal nitrided oxide, N2 remote plasma nitrided oxide, and nitride oxide stack are extensively investigated and discussed.
Firstly, we start with a review of the present understanding of general ultra-thin oxide issues, their mutual relationship, effects on the gate oxide integrity and consequences for oxide thickness scaling. Issues relating quantum mechanical tunneling current, boron penetration, polysilicon gate depletion, and its impacts on device operation, power consumption, reliability, and metrology for thickness measurement are comprehensively demonstrated. A novel and simple method to determine the ultrathin oxide thickness from measuring the flatband capacitance is presented as well.
Secondly, the characteristics and the feasibility of the ultra-thin (equivalent oxide thickness (EOT) =13~16Å) nitrided oxides formed by rapid thermal nitridation in NH3 ambient are thoroughly investigated. The physical properties including the nitridation mechanism, the nitrogen distribution profile and the physical thickness are studied. The electrical properties, which include barrier height lowering, effect, EOT, gate leakage reduction capability, carrier mobility, dielectric reliability, and other important device parameters are demonstrated. Their differences between N and PMOS are extremely studied as well. The results show this NH3 nitrided oxide exhibits excellent downscaling ability, except the undesirable hole mobility degradation.
Thirdly, we comprehensively investigate the physical and electrical characteristics of the ultrathin nitrided oxides formed by the advanced remote plasma nitridation approach. It was found that remote plasma nitrided oxide with base oxide thickness larger than ~20Å exhibits excellent nitrogen profile, good EOT and gate leakage reduction capability, and almost no degradation was observed in carrier mobility. However, the impacts of the nitrogen radicals penetration including thickness re-growth, additional electron mobility degradation, and plasma-induced damage were observed as base oxide thinner than ~20 Å. The radical-induced re-oxidation and plasma-induced electron trapping models are proposed to explain the above abnormal phenomena. Additionally, the downscaling limit of the remote plasma nitrided oxide is studied, based on the consideration of EOT, gate leakage criteria, and mobility degradation.
Finally, the electrical characteristics of the ultrathin nitride/oxide gate stack (~1.6nm) affected by the base oxide material and post deposition annealing are extensively studied. It was observed that the use of nitrogen-rich base oxide can effectively reduce the inconsistency at Si3N4/SiO2 interface and retard the nitrogen diffusion into substrate during post-deposition annealing, leading to a superior device performance. The opposite effects of the NH3 and subsequent N2O post annealing on the EOT, gate leakage reduction, and mobility of the ultra-thin nitride/oxide stack are also compared and discussed.
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