The Study of Ultra-Thin Nitride-Related Gate Dielectrics for Deep Sub-Micron CMOS Process Application
博士 === 國立成功大學 === 電機工程學系碩博士班 === 90 === As the aggressive downscaling of CMOS technology continues, further reduction of gate oxide thickness is essential for low supply voltage and high driving capability. However, the excessive gate direct tunneling and the boron penetration issues phase out the u...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2002
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/b5zf9z |