| Summary: | 碩士 === 國立交通大學 === 電信工程系 === 90 === The purpose of this paper is to study fully integrated CMOS frequency synthesizer with quadrature phase outputs, for DCS1800 applications. The synthesizer has the capability of low phase noise and quadrature phase output for low IF receiver. The crucial points are frequency accuracy, equal amplitude and quadrature phase. The phase noise is examined by the linear time varying model . As for quadrature phase, two kinds of circuits are employed. One is the VCO coupled pairs, and the other is poly-phase architecture. The entire circuits are tapeouted by CIC, which using the TSMC 0.35um process to manufactured.
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