The Discussion and Design of Flash Memory Control

碩士 === 國立清華大學 === 電機工程學系 === 90 === This thesis is a research about the design of flash memory control. As capacity of flash memory card grows, the design of flash memory control, which governs data in flash memory, is getting more important. We divide the issue of flash memory control de...

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Main Authors: Shiuan-Fu Hung, 洪璿富
Other Authors: Tai-Lang Jong
Format: Others
Language:en_US
Published: 2002
Online Access:http://ndltd.ncl.edu.tw/handle/33836860465843822259
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spelling ndltd-TW-090NTHU04420392015-10-13T10:34:06Z http://ndltd.ncl.edu.tw/handle/33836860465843822259 The Discussion and Design of Flash Memory Control 快閃記憶體控制器的探討及設計 Shiuan-Fu Hung 洪璿富 碩士 國立清華大學 電機工程學系 90 This thesis is a research about the design of flash memory control. As capacity of flash memory card grows, the design of flash memory control, which governs data in flash memory, is getting more important. We divide the issue of flash memory control design into several parts: logical/physical address translation, utilization of limited local memory, manners of caching data from flash memory to local memory and flash memory management. About those topics, a complete flash memory control model is built in this paper. Besides, the design has improved the speed of seeking free space and the tradition update-algorithm. In flash memory management, the emphasis of cycle-leveling enhances the flash memory performance dramatically. It shows that besides good clean policy and fine data classification, cycle-leveling is also essential for flash memory management. Finally, there will be a series simulation result which is computed from a developed software model of our design. It will be a strong proof of this design. Tai-Lang Jong 鐘太郎 2002 學位論文 ; thesis 50 en_US
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description 碩士 === 國立清華大學 === 電機工程學系 === 90 === This thesis is a research about the design of flash memory control. As capacity of flash memory card grows, the design of flash memory control, which governs data in flash memory, is getting more important. We divide the issue of flash memory control design into several parts: logical/physical address translation, utilization of limited local memory, manners of caching data from flash memory to local memory and flash memory management. About those topics, a complete flash memory control model is built in this paper. Besides, the design has improved the speed of seeking free space and the tradition update-algorithm. In flash memory management, the emphasis of cycle-leveling enhances the flash memory performance dramatically. It shows that besides good clean policy and fine data classification, cycle-leveling is also essential for flash memory management. Finally, there will be a series simulation result which is computed from a developed software model of our design. It will be a strong proof of this design.
author2 Tai-Lang Jong
author_facet Tai-Lang Jong
Shiuan-Fu Hung
洪璿富
author Shiuan-Fu Hung
洪璿富
spellingShingle Shiuan-Fu Hung
洪璿富
The Discussion and Design of Flash Memory Control
author_sort Shiuan-Fu Hung
title The Discussion and Design of Flash Memory Control
title_short The Discussion and Design of Flash Memory Control
title_full The Discussion and Design of Flash Memory Control
title_fullStr The Discussion and Design of Flash Memory Control
title_full_unstemmed The Discussion and Design of Flash Memory Control
title_sort discussion and design of flash memory control
publishDate 2002
url http://ndltd.ncl.edu.tw/handle/33836860465843822259
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