| Summary: | 碩士 === 國立臺灣大學 === 電機工程學研究所 === 90 === With designs becoming increasingly complex, the scope and scale of verification requirements faced by system, ASIC, and SOC verification engineers have dramatically expanded. This has, in turn, resulted in traditional approaches to functional verification proving to be significantly insufficient.
In this thesis, we present the Perl/Verilog-based hybrid verification collaborative infrastructure (VCI) developed on Sun/Linux systems that attempts to reduce the test development time and make the verification environment more flexible. VCI provides an interface between the procedural Perl testbench and the declarative Verilog code that describes the design under test. The integration of Perl/Verilog exploits existing mainstream implementation languages and methods to raise the level of abstraction of specifying test generators, result checkers, and architectural reference models.
VCI consists of a set of application program interface (API) routines to bridge the gap between the procedural language Perl and the declarative world of Verilog. The experimental results show that VCI provides more effective verification testing with higher productivity. In addition, VCI integrates seamlessly with existing methods and environments supporting Hardware/Software co-verification and also large-scale project requirements for design management and regression.
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