Automatic Gain Control for VDSL Receiver Analog Front End

• Main Authors: HAO-SHUN CHANG, 章豪順
• Other Authors: Chorng-Kuang Wang
• Format: Others
• Language: en_US
• Published: 2002
• Online Access: http://ndltd.ncl.edu.tw/handle/29298378404664587316

碩士 === 國立臺灣大學 === 電機工程學研究所 === 90 === The broadband access technologies, such as various kinds of digital subscriber loops (xDSL) have been implemented with a mixture of IC technologies. They provide robust transport of data on twisted pair without interfering with classical telephone service. However, to overcome high attenuation and large echo of the copper wire, the analog front end circuit (AFE) should possess low noise enhancement, low signal distortion, accurate channel filtering and high dynamic range characteristics. This thesis presents the design and implementation of a low-voltage dual-loop mixed-signal automatic gain control (AGC) for Very High Speed Digital Subscriber Loop (VDSL) system. The AGC consists of an analog forward signal path and a digital feedback control path. Applied to VDSL system for up/down stream, the AGC calls for its analog parts operating in tens of Mega-hertz frequency. To robustly control the gain of the AGC, the control path takes advantage of digital circuitry that is less susceptible to process and temperature variations. The control path is configured as a dual-loop structure that switches the loop bandwidth to 12kHz in the acquisition state and 5.6kHz in the steady state. This facilitates a faster acquisition process and a noise-insensitive control. Implemented in 0.35um TSMC 1P4M digital CMOS technology, the AGC occupies 1.9mm X 2.1mm chip area. According to the simulation, it provides constant magnitude output for input signal strength from 20mVpp to 400mVpp. The acquisition time is less than 0.5ms. The analog forward path consumes 36mW under 2V supply voltage and the digital feedback path draws 3.35 mA from 3.3V supply voltage.