The Reserch and Simulation of Software Cache Coherence Schemes for Doacross Loop
碩士 === 國立臺北科技大學 === 電腦通訊與控制研究所 === 90 === Cache coherence problem is a major concern on shared-memory multiprocessors system. Hardware solution of cache coherence schemes for large-scale shared-memory multiprocessor cost much complexity and expensive when the processors increase. So the s...
Main Authors: | Ming-Hung Chiu, 許民宏 |
---|---|
Other Authors: | Rong-Yuh Hwang |
Format: | Others |
Language: | zh-TW |
Published: |
2001
|
Online Access: | http://ndltd.ncl.edu.tw/handle/67701022161281882842 |
Similar Items
-
DOACROSS Loops Parallelization for Parallelizing Compilers
by: Shih-Hung Kao, et al.
Published: (1995) -
Run-time parallelization of irregular DOACROSS loops
by: Jeyaraman, Thulasiraman
Published: (2013) -
Run-time parallelization of irregular DOACROSS loops
by: Jeyaraman, Thulasiraman
Published: (2013) -
Delayed Invalidation -- A Software-Based Cache Coherence Scheme
by: Tang-Show Hwang, et al.
Published: (1994) -
A new cache coherence scheme in multiprocessor systems
by: FAN,XIU-WEI, et al.
Published: (1991)