Implementation of MIPS-like CPU and Its Relative Verification Environment

• Main Authors: Hou Au-ping, 侯傲平
• Other Authors: Yi-wen Wang
• Format: Others
• Language: en_US
• Published: 2003
• Online Access: http://ndltd.ncl.edu.tw/handle/55201348769272292056

碩士 === 逢甲大學 === 資訊工程所 === 91 === In this thesis, I construct a hardware/software system, open MIPS, for reconfigurable computing, which targets more bottlenecks including SoC such as HW/ SW co-simulation or co-emulation. Open MIPS project is a part of reconfigurable computing (RC). The goal of open MIPS project is to build a MIPS CPU and its related tools, such as c compiler, assembler, linker and so on. Reconfigurable computing is to achieve high performance computation with dynamically configuring hardware when program running. For example, using RC method to speed up some parts of MPEG can achieve a high performance compression. Thus, RC handles hardware/ software (HW/ SW) co-design because the goal of RC involves HW/ SW optimization. Developing RC environment, because any components in HW/ SW influence whole design, developer must need a well platform to immediately observe hardware and software status. Conventionally independent HW and SW simulator will be a bottleneck of the RC project so that RC designers are hard to evaluate or to simulate their RC design. Thus, we create an environment to let RC developer observing and evaluating their design in hardware and software at the same time. The environment is built for the preparation of the HW/ SW co-verification. HW/ SW co-verification will play a important role for time-to-market and correct SoC chip design. Besides, the simulation speed is too slow in hardware/ software co-simulation, so we also enhance our environment to make hardware/ software co-emulation possible.