Design and Implementation of Frequency Synthesizer for 2.4 GHz Wireless Communication

• Main Authors: Jong-Rong Chen, 陳忠榮
• Other Authors: M. L. Her
• Format: Others
• Language: zh-TW
• Published: 2003
• Online Access: http://ndltd.ncl.edu.tw/handle/7vssgw

碩士 === 逢甲大學 === 電子工程所 === 91 === ABSTRACT The phase locked loop ( PLL ) based frequency synthesis technique is the most commonly used method of producing high frequency oscillation in modern communication equipment for the sake of the frequency accuracy and channel selection. For conventional PLL based frequency synthesizer structures, there exists a trade-off between the frequency switching speed and the phase noise and the loop bandwidth, thus the frequency synthesizer is still one of the difficult building module in RF front end. A PLL based frequency synthesizer has been integrated and tested. The operation frequency range is 2.378 GHz ~ 2.4835 GHz , the phase noise is below —105 dBc/Hz at 100 kHz offset by means of improving the phase noise of the voltage controlled oscillator ( VCO ) , which could apply to 2.4 GHz band wireless communication technology.