Efficient Built-in Self-test Techniques for Memory-Based FFT Processors
碩士 === 輔仁大學 === 電子工程學系 === 91 === An efficient built-in self-test (BIST) architecture for memory-based FFT processor has been proposed in this paper. The BIST architecture can reduces the testing time during the test mode. It is because that the memory module and the logic module of the memory-based...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/97345365948679046162 |