Design of C-Band Low Noise Amplifier and Power Amplifier

碩士 === 國立成功大學 === 微電子工程研究所碩博士班 === 91 === This thesis presents the design and implementation of C-band low noise amplifier and power amplifier. In the communication system, low noise amplifier and power amplifier are the key components at the receiving and transmitting end. Due to high data rate req...

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Bibliographic Details
Main Authors: Chih-Ming Lin, 林志民
Other Authors: Wei-Chou Hsu
Format: Others
Language:en_US
Published: 2003
Online Access:http://ndltd.ncl.edu.tw/handle/71874483987284061467
Description
Summary:碩士 === 國立成功大學 === 微電子工程研究所碩博士班 === 91 === This thesis presents the design and implementation of C-band low noise amplifier and power amplifier. In the communication system, low noise amplifier and power amplifier are the key components at the receiving and transmitting end. Due to high data rate requirement, many C-band wireless applications have been proposed and developed. Hybrid MIC ( Microwave Integrated Circuit ) and microstrip-line configuration are employed in this design. Matching networks are realized on the alumina substrates. The low noise amplifier was realized in a housing which was comprised of two MIC low noise modules. In order to achieve minimum noise figure and good input and output VSWR ( Voltage Standing-Wave Ratio ) simultaneously, each module was developed with balanced amplifier configuration using two discrete 300μm GaAs pHEMTs. The module was assembled on a Kovar carrier. It attains 0.9 dB noise figure and 12 dB small signal gain from 5.3 to 5.9 GHz band. The complete amplifier reveals noise figure as low as 0.95 dB with associated gain over 23.5 dB from 5.3 to 5.9 GHz. This low noise amplifier shows excellent noise performance enough for various C-band applications such as high data rate wireless LAN ( Local Area Network ) and ISM ( Industrial, Scientific, and Medical ) applications. The power amplifier was developed using 12 mm GaAs pHEMT device. It delivers over 4 watt of output power from 5.7 to 6.3 GHz band, with 10 dB power gain and 40% power-added efficiency. The design employed the internally matched FET approach to match the lower input and output impedance of the power device. To achieve optimum power match, we utilized Cripps’s load-line theory to predict optimum output impedance. The complete amplifier was mounted on a CuW carrier. This power amplifier is intended to be used in the transceiver for C-band wireless and satellite communication systems.