Dispatching Rules for Raising Hit Rate in Wafer Fabs

• Main Authors: Cheng-Feng Kao, 高正峰
• Other Authors: Muh-Cherng Wu
• Format: Others
• Language: zh-TW
• Published: 2003
• Online Access: http://ndltd.ncl.edu.tw/handle/54068718018533689007

碩士 === 國立交通大學 === 工業工程與管理系 === 91 === Hit rate, the rate of on-time delivery, recently becomes a very important performance index in semiconductor foundry fabs. Yet, previous studies on lot dispatching focused on some other relevant performance indices, but very few directly focus on the raising on hit rate. This research aims to develop dispatching algorithms for raising the hit rate of semiconductor fabs. Some popular dispatching rules are first examined by discrete event simulation. Results show that CR (critical ratio) dispatching rule exceeds the others. This research proposes three novel perspectives to enhance the CR dispatching rule. The hit rate performance of the enhanced-CR rules and some significant dispatching rules in literature are compared by simulation, in scenarios varying in product mix and fab loading. Simulation results show that DCR（delay critical ratio）, one of the enhanced-CR dispatching rules, outperforms the others.