| Summary: | 碩士 === 國立交通大學 === 電子工程系 === 91 === In order to design a flexible and efficient variable-length FFT processor module suitable for various OFDM communication systems, the thesis studies various design techniques from algorithm level to architecture level. Key issues and consideration for the design of an FFT processor applied to specific OFDM communication systems are also analyzed. The thesis proposes several controller designs that include an improved data address generator, coefficient index generator, and twiddle factor generator, for the realization of a low-power and low cost variable-length FFT processor. Following that, the thesis realized design example that integrates some proposed techniques is presented. Finally, the thesis proposes a variable-length FFT processor architecture, which can suit the needs of all the FFT demodulation operations of 802.11a, 802.16a, DAB, DVB-T, and VDSL.
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