| Summary: | 碩士 === 國立清華大學 === 電子工程研究所 === 91 === Abstract
The power amplifiers (PA) are key components to provide sufficient gain and output power at the final stage of the transmitter. The requirements of solid-state power amplifiers include aspects of high power level, high efficiency, high linearity and high operating frequency, and the relative importance between those features is highly depending on its specific application.
This thesis is divided into two parts. The first part focuses on developing a mathematical model which is based on PA operation in Class AB. And we optimize PA design by this mathematical model.
The second part includes the design of power amplifiers using the load-line theory (Cripps Method) and checking by ADS load pull simulation.
The operating frequency range of our power amplifier is 5.15 ~5.35 GHz, and DC power supply is 3V. We use 0.35um BiCMOS SiGe HBT process of TSMC to design our circuit by matching S-parameters and optimizing load for maximum power output in the output matching network. In the simulation results, the linear gain of power amplifier is 17.78 dB and when input signal power is 5 dBm, the maximum power output obtained is 22.68 dBm， the power efficiency is 37.67 %, and the IIP3 is 12.5 dBm. The simulation tool ADS 2002 is used to design the circuit , and Cadence Virtuaso Layout Editor is used to finish IC layout.
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