| Summary: | 碩士 === 國立海洋大學 === 電機工程學系 === 91 === Abstract
This thesis presents the design of a 2.4GHz CMOS wireless communication RF transmitter circuit. The transmitter contains power amplifier (PA), a quadrature up conversion mixer and quadrature voltage control oscillator (VCO). We implement it in TSMC 0.35um CMOS process. For enough output power and good efficiency, we adopt two-stage differential power amplifier, simulation results show that single power amplifier provides 17.44dBm output power and 22% maximum power added efficiency. Quadrature up conversion mixer provides 1.45dB conversion gain, -8dBm 1dB-compression point (P1dB), 2.59dBm Third-Order Intermodulation Intercept Point (IP3). Quadrature VCO with 100MHz tuning range and —115.18dBc phase noise at 1MHz offset. Finally, the transmitter shows the simulation results of 14.29dB conversion gain, -8dBm 1dB-compression point, -0.92dBm Third-Order Intermodulation Intercept Point. Whole transmitter power consumption is 182.825mW.
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