Parallel Architecture Design of H.264/MPEG-4 AVC Intra Coder for SDTV Applications

碩士 === 國立臺灣大學 === 電子工程學研究所 === 91 === In this thesis, we propose a parallel architecture design of H.264/MPEG-4 AVC intra coder with the capability of processing video data at SDTV (720x480x30fps) quality. It is suitable for intra coding based applications, such as DV video editing, digital still ca...

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Bibliographic Details
Main Authors: Bing-Yu Hsieh, 謝秉諭
Other Authors: Prof. Liang-Gee Chen
Format: Others
Language:zh-TW
Published: 2003
Online Access:http://ndltd.ncl.edu.tw/handle/67235564355398011966