A BIST techniq;ue for timing jitter testing
碩士 === 國立臺灣大學 === 電子工程學研究所 === 91 ===
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Online Access: | http://ndltd.ncl.edu.tw/handle/30359286474133695763 |
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ndltd-TW-091NTU004280702016-06-20T04:15:45Z http://ndltd.ncl.edu.tw/handle/30359286474133695763 A BIST techniq;ue for timing jitter testing 內建式時脈抖動測試技術 吳丞騏 碩士 國立臺灣大學 電子工程學研究所 91 黃俊郎 2003 學位論文 ; thesis 0 zh-TW |
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zh-TW |
format |
Others
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description |
碩士 === 國立臺灣大學 === 電子工程學研究所 === 91 ===
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author2 |
黃俊郎 |
author_facet |
黃俊郎 吳丞騏 |
author |
吳丞騏 |
spellingShingle |
吳丞騏 A BIST techniq;ue for timing jitter testing |
author_sort |
吳丞騏 |
title |
A BIST techniq;ue for timing jitter testing |
title_short |
A BIST techniq;ue for timing jitter testing |
title_full |
A BIST techniq;ue for timing jitter testing |
title_fullStr |
A BIST techniq;ue for timing jitter testing |
title_full_unstemmed |
A BIST techniq;ue for timing jitter testing |
title_sort |
bist techniq;ue for timing jitter testing |
publishDate |
2003 |
url |
http://ndltd.ncl.edu.tw/handle/30359286474133695763 |
work_keys_str_mv |
AT wúchéngqí abisttechniquefortimingjittertesting AT wúchéngqí nèijiànshìshímàidǒudòngcèshìjìshù AT wúchéngqí bisttechniquefortimingjittertesting |
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1718310513434165248 |