| Summary: | 碩士 === 國立雲林科技大學 === 電子與資訊工程研究所碩士班 === 91 === With the advence of multimedia application, the emerging still image compression – JPEG2000 – had be define as a standard recently. It have adopted “Lifting-based DWT” as their transform coder. We use MATLAB analysis to find the best hardware bit-width that satisfies the minumum JPEG2000’s lossy for codec needed. In this thesis, 97.7dB high quality PSNR is obtained by our 1-D Lifting-based DWT.
The residue number system has carry-free and high parallel property. It agrees with fast operation. We try to design RNS Lifting-based DWT and to discuss the design problem. In this thesis, an efficient VLSI architecture of (2^m-1, 2^m, 2^m+1) module set B/R converter is proposed. Its hardware cost and propagation time has be reduced 36.6% and 9.5%, respectively. The proposed architecture has been implemented in TSMC 0.35um 1p4m CMOS process technology and its working frequency is 94MHz.
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