| Summary: | 碩士 === 大葉大學 === 電機工程學系碩士班 === 92 === The layout design is important in analog CMOS IC design flow. Having low susceptibility to digital noise and low sensitivity to process variation are necessary qualities for the layout design. Therefore, the layout design is always a time-consuming and manual task.
In this thesis, we discuss the optimal layout design of resister and capacitor. Furthermore, we use TSMC 0.25um technology to implement various switched-capacitor circuits, such as inverter, adder, integrator, 1bit digital to analog converter, and sigma-delta modulator, and so on.
Key words: RC layout、Switched-Capacitor Circuit、Sigma-Delta Modulator
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