| Summary: | 碩士 === 大葉大學 === 電機工程學系碩士班 === 92 === In this thesis, bit-level systolic arrays for RSA public key cryptosystem are designed based on an improved Montgomery’s algorithm. The utilization of the multiplier is 100% since we can interleave the square and multiplication operation in the modular exponentiation algorithm.
A fastest radix-4 systolic bit-interleaving RSA cryptosystem is designed based on modified Booth’s algorithm. Due to reduced number of iterations and pipelining, our radix-4 RSA cryptosystem is four times faster than the conventional RSA cryptosystem. The critical path delay of our design is only 2.43ns. It takes about 0.26M clock cycles to finish a 512-bit modular exponentiation. Therefore, the baud rate is about 656Kb/s at 333MHz clock.
Keyword: Montgomery’s algorithm, Booth Algorithm, RSA, public-key cryptosystem.
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