| Summary: | 碩士 === 國立高雄應用科技大學 === 電機工程系碩士班 === 92 === This thesis proposes an approximated method to simulate and design the functions of distance relay (impendence relay) to efficiently detect the three-phase balanced fault on the transmission line, as well as to analyze the reach of digital distance relay in three types of power system models. Based on the proposed methodology, the FPGA technique is applied to design and implement the digital distance relay. Finally, a sensitivity analysis is applied to discuss the effect of grounding impedance, voltage source ratio to the value of relay terminal impedance and then the modified error is introduced to improve the ability of fault location detection.
There are two purposes in this thesis. The first purpose of this thesis is to utilize the MATLAB package to run the power flow and fault calculation to obtain the parameters of voltage, current and then impedance at relay location with respect to different faulted located along the transmission line. Based on the simulation results, the relationship between relay measured impedance and faulted location (impedance) can easily be established. Several extreme cases in different faulted location are simulated to establish the exact protection area. In the case of occurring faults on transmission line, the proposed approach can efficiently detect the fault situation and can estimate the faulted location. The second purpose of this thesis is to apply FPGA XC2s200 chip and their peripheral produced by Xilinx corp. and local Zeppe corp. respectively to finish the design procedures of synthesis, justification, simulation, pin assignment, generating program, and program download for FPGA. Finally the verification for the FPGA design shows that the better performance and the effectiveness of the proposed methodology can be achieved.
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