Study on Advanced Nonvolatile Memory Devices

• Main Authors: Shuo-Ting Yan, 顏碩廷
• Other Authors: Simon M. Sze
• Format: Others
• Language: en_US
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/51130778416502772343

博士 === 國立交通大學 === 電子工程系所 === 92 === We have studied experimentally and theoretically three types of nonvolatile semiconductor memories: the SONOS, the nanocrystal/nanodot, and the quasi-superlattice memory devices. On the study of the silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory technology, high density plasma chemical vapor deposition (HDPCVD) is used to fabricate trap-rich silicon nitride or other dielectrics as the charge storage element. It is observed that the densified and trap-rich silicon nitride film from HDPCVD possesses a larger memory window than that of the conventional low pressure chemical vapor deposited (LPCVD) silicon nitride. It is found from the Fourier Transform Infrared Spectrum (FTIR) that there are N-H bonds within the HDPCVD silicon nitride as the charge trapping sites, which certifies the reason of the larger memory window. The HDPCVD silicon nitride is deposited on the tunnel oxide, followed by a high temperature oxidation process. As compared to the LPCVD deposition as the control oxide, the HDPCVD processes result in a lower leakage current and higher breakdown voltage. In addition to silicon nitride as the storage layer, we have also studied the oxide/SiC:O/oxide sandwiched structures using HDPCVD processes. From the capacitance-voltage and current-voltage characteristics of oxygen-incorporated silicon carbide with different oxygen content, it is observed that the memory window is decreased with increasing the oxygen content. By controlling the oxygen content, a higher breakdown voltage can be achieved. A physical model is proposed to explain the higher breakdown voltage with less oxygen content of the oxygen-incorporated silicon carbide. We have also studied the thermal oxidation of SiC layer on the tunnel oxide as the charge storage layer followed by control oxide capped. In the study of the oxidation of SiC, it is found that low temperature (800 ℃) oxidized SiC shows a larger memory window than that of the high temperature (925 ℃) oxidized SiC. Using the FTIR spectroscopy, a physical model is proposed to explain the behavior of low temperature oxidized SiC with larger memory window. On the study of the quasi-superlattice structure, we have sequentially deposited 1-2 nm silicon nitride and a-Si on a 2-3 nm tunnel oxide in two cycles to form the quasi-superlattice structure. Finally, SiO2 is capped as the control oxide. The memory window is increased with the programming voltage. Also, two sudden rises of the threshold voltage shift are observed. By suitably operated gate voltage, this memory device shows the capability of the operation of 2-bit per cell. The 2 bits can be operated and defined by F-N tunneling rather than the source/drain bidirectional programming and reading of the conventional SONOS memory devices. A physical model is proposed to explain the 2-bit storage and the investigation of room and low temperature leakage behavior of the gate stack is also considered. On the study of nanocrystal nonvolatile memory devices, we have successfully fabricated germanium nanocrystals embedded in silicon dioxide by the thermal oxidation of SiGe. SiGe layer is deposited on the tunnel oxide, followed by high temperature thermal oxidation. The Ge element of the SiGe layer is downward segregated and precipitated on the tunnel oxide and the Si element is oxidized into silicon dioxide as the control oxide. From the analyses of the TEM micrograph, it is observed that the size of the Ge nanocrystals is around 5.5 nm. The memory effects and the reliability of the memory are characterized robust. As the germanium nanodots are over-oxidized, the germanium nanodots are oxidized into germanium oxide dots. It is found that the germanium oxide exhibits an apparent memory effects. Also, the x-ray absorption near edge spectroscopy (XANES) analysis certifies the composition of the GeO2 nanodots in the TEM micrograph. A physical model is proposed to demonstrate the memory effects of the GeO2 memory device. In addition to semiconductor nanocrystals, metal nanodots are investigated. On the aspect of the fabrication of metal nanodots, tungsten nanodots are firstly demonstrated. The tungsten silicide layer is physically deposited on the tunnel oxide and an amorphous Si layer is capped on the silicide layer. As the sample is high temperature thermally oxidized, the silicon element is oxidized into silicon dioxide as the control oxide and the tungsten element tends to segregate downward and precipitate on the tunnel oxide. During the oxidation process, the parameters of the oxidation need to be well control or the tungsten silicide will be under-oxidized or over-oxidized. The tungsten nanocrystal memory device shows a large memory window to be defined as “1” or “0”. Also, the endurance characteristics of the memory device achieve 106 write/erase cycles which show the robustness of the memory device.