MPEG-4 AAC implementation and optimization on DSP/FPGA

碩士 === 國立交通大學 === 電子工程系所 === 92 === MPEG-4 AAC (Advanced Audio Coding) is an efficient audio coding standard. It is defined by the MPEG (Moving Pictures Experts Groups) committee, which is one of ISO (International Standard Organization) working groups. In this thesis, we first analyze the computati...

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Bibliographic Details
Main Authors: Chien-Tung Tseng, 曾建統
Other Authors: Hsueh-Ming Hang
Format: Others
Language:en_US
Published: 2004
Online Access:http://ndltd.ncl.edu.tw/handle/9fpt4a
Description
Summary:碩士 === 國立交通大學 === 電子工程系所 === 92 === MPEG-4 AAC (Advanced Audio Coding) is an efficient audio coding standard. It is defined by the MPEG (Moving Pictures Experts Groups) committee, which is one of ISO (International Standard Organization) working groups. In this thesis, we first analyze the computational complexity of MPEG-4 AAC decoder program. We found that the Huffman decoding and the IMDCT (inverse modified discrete cosine transform) require the most clock cycles to execute on DSP. Hence, we optimize the IMDCT codes on DSP. In addition, we use FPGA to remove the bottleneck in DSP execution. Thus, we implement the Huffman decoding and the inverse fast Fourier transform), which is a part of IMDCT, on FPGA. In order to speed up the AAC decoder on DSP, we need to choose appropriate algorithms for DSP implementation. Thus, appropriate data types are chosen to present the data. Furthermore, we use the TI (Texas Instruments) DSP intrinsic functions to increase the DSP execution efficiency. The modified version of IMDCT is about 503 times faster than the original version. For the FPGA implementation, we adopt and modify the existing architectures for Huffman decoding and 512-point IFFT. In addition, we use VLSI design techniques to improve the performance and reduce the chip area in FPGA implementation. The FPGA implementation of Huffman decoding and 512-point IFFT is about 56 and 4 times faster than the corresponding DSP implementations, respectively. Also, in this project, we design and implement the communication interface between DSP and FPGA.